C compiler

A backend has been added to clang to support the MOS instruction set. This backend may be targeted by adding the flag  to clang.

Like all LLVM backends, the bulk of the implementation exists in its own directory within the LLVM hierarchy, in llvm/lib/Target/MOS. However, unlike most other LLVM backends, llvm-mos uses LLVM's new GlobalISel architecture for lowering LLVM-IR generic instructions to LLVM specific ones. It lowering IR instructions to MOS via a set of carefully chosen pseudoinstructions, which in turn represent logical groups of MOS instructions.

The llvm-mos backend performs almost no optimization of MOS code at the machine instruction level. Instead, LLVM is permitted to run multiple passes on MOS pseudoinstructions, which are lowered relatively late in the compilation pass pipeline to actual MOS instructions. Interestingly, this permits LLVM's existing core to handle optimization and lowering to a degree unusual for a processor of MOS's small size.

The original architects of the NMOS 6502 compensated for the 6502's small number of registers by providing 256 bytes of memory called Zero page, which could be accessed relatively quickly and cheaply by the processor. The llvm-mos C compiler utilizes a user-selectable range of zero-page memory, and performs nearly all of its operations there directly. We refer to this treatment of selectable ranges of zero page as imaginary registers, which not to be confused with LLVM's virtual registers. Code generation allocates and chooses imaginary registers for all operations that do not access 16-bit memory. However, the imaginary register locations are treated as symbols, which are not resolved to exact locations until link time.